Invalidating cache line

invalidating cache line-4
Run Increment (ns): 8355 Average, 8302 Minimal, 8409 Maxmial Monitor Volatile Atomic.

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This is safe, as it effectively does the read, increment, and write in 'one hit' which can't be interrupted.

Because of this it won't affect any other code, and you don't need to remember to lock elsewhere either.

As you can imagine, this means other processors could write an updated value back to m_Var after it's been read by cpu A.

So instead of now having incremented the value twice, you end up with just once. For more info, see 'Understand the Impact of Low-Lock Techniques in Multithreaded Apps' - All the replies were so blatantly incorrect (especially the one marked as answer) in their explanation I just had to clear it up for anyone else reading this. I'm assuming that the target is x86/x64 and not IA64 (it has a different memory model).

A solution would be to lock, but you could also use volatile in this situation.

This would ensure that thread B will always see the most up-to-date thing that thread A has written.

I won't go too far into the details of this but rest assured that if this goes wrong, Intel/AMD would likely issue a processor recall!

This also means that we do not have to care about out of order execution etc.

Interlocked is not necessary faster in multi-cpu environment.

Here is the test result for Increment on a 2 years old 16 CPU server.

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